MCH for Physics or MTCA.4 applications with optical and copper PCIe Uplinks

The most recent member of the NAT-MCH family of products, the NAT-MCH-PHYS80, is addressing the requirements for higher bandwidth to both AMCs and the rear transition slot of the MCH as well as for optcial and copper uplinks in PCIe based MTCA.4 systems, targeting at large control and data acquisition applications.

Based on the NAT-MCH-M4, the double width MCH base board for MicroTCA.4 systems and combined with the special low latency and low jitter clock module NAT-MCH-CLK-PHYS, the new PCIe hub module turns the NAT-MCH-PHYS80 into the most powerful single-slot solution for management and switching that is available for MTCA.4.

Special low jitter, low latency clock module for Physics appliances

The clock module NAT-MCH-CLK-PHYS has especially been designed for Physics applications, providing a very low jitter and low latency clock at CLK1 and CLK2 and a fixed mean 100MHZ PCIe clock. The NAT-MCH-PHYS80 is capable of sourcing an external clock from or delivering an internal clock to two SMA inputs or outputs at the front panel. This allows installations of many MTCA systems to be synchronized to a central clock source in a very elegant and easy to use way.

PCIe Gen3 switch providing optical or copper uplinks and virtual clustering

The new PCIe hub module provides an 80-port PCIe Gen3 switch that allows each of the 12 Advanced Mezzanine Cards (AMC) in a MicroTCA.4 system to be connected by a x4 link and additionally provides either two x8 or one x16 optional optical PCIe uplink(s) to external high performance servers or other MTCA.4 systems (NAT-MCH-PHYS80-UPLNK only) and a x16 link to the rear transition module. If no optical but coppper uplinks are required, the NAT-MCH-PHYS80 can be used together with the rear transition module NAT-MCH-RTM-UPLNK, then providing one x16 copper uplink at the front panel of the rear transition module. The PCIe switch also accomodates higher bandwidths, i.e. x8 or x16, to a reduced number of AMC slots if the backplane provides appropriate connectivity. Finally, the PCIe switch provides the ability to establish up to six virtual PCIe clusters and assign the AMC slots to these.

Rear Transition Module with Intel® dual or quad Core™ i7

When used together with its new Rear Transition Module (RTM) NAT-MCH-RTM-RF the NAT-MCH-PHYS80 also connects the optionally mounted Intel® dual or quad core Core™ i7 Ivy Bridge ComExpress module by a x16 link to the PCIe Gen3 switch. As the fully user accessible Intel® quad Core™ i7 on the NAT-MCH-RTM-RF can act as a PCIe root complex, this x16 PCIe link overcomes the bottle neck between the root complex and many PCIe based I/O payload AMCs which in most MTCA.4 systems are connected by a x4 link only.

Single slot solution for system management and PCIe root complex

Like the NAT-MCH-PHYS the NAT-MCH-PHYS80 can be equipped with SSD storage that will then turn the combination of NAT-MCH-PHYS80 and NAT-MCH-RTM-RF-COMex-i7Q into a true single-slot fully user-accessible root complex at PCIe Gen3 speed.

Management for Low Level RF (LLRF) backplane

The purpose of the LLRF backplane, which in MTCA.4 can be optionally mounted behind the standard MTCA.4 backplane, is to distribute high-precision RF and CLK signals as commonly used in particle physics among extended Rear Transition Modules (eRTM) as well as to supply additional managed power to these eRTMs and standard RTMs (uRTM or μRTM) having an additional connector to the LLRF backplane. By using the Rear Transition Module NAT-MCH-RTM-RF, which also connects the management for the LLRF backplane to the MCH management, the NAT-MCH-PHYS80 can manage both eRTMs as well as uRTMs and the additional power modules (RTM-PM) connected to the LLRF backplane.

Redundant Environments

The NAT-MCH-PHYS80 fully supports redundant management and power environments. Frequent exchange of the internal databases with the secondary MCH and a heart beat mechanism ensure an immediate switch-over from the primary to the secondary MCH whenever it becomes necessary (PCIe fat pipe switch over may require additional precautions). The NAT-MCH-PHYS80 can handle up to four power modules (i.e. NAT-PM-DC840 or NAT-PM-AC600) for N+1 configurations.

Software Support and Updates

Apart from the JAVA GUI NATview the NAT-MCH-PHYS80 also supports external management solutions which are based on the Remote Management Control Protocol (RMCP) i.e. the open-source tool ipmitool. Furthermore, using the NAT-MIB the NAT-MCH-PHYS80 can also be integrated into environments based on the Simple Network Management Protocol (SNMP). The NAT-MCH-PHYS80 can be configured using either uploadable text based script files or via the integrated WEB interfaces using a standard web browser. Finally, the integrated debug and configuration facilities can be accessed via a serial console or using Telnet. Customers registering for the firmware update service are automatically notified by e-mail when a new firmware version becomes available.

Family of MCH products

The NAT-MCH-PHYS80 is a member of the NAT-MCH family of MCHs which consists of:


Key features
Technical details
Block diagram
Order code
The NAT-MCH-PHYS80 is the powerful management and data switching entity for all MicroTCA.4 systems targeting at PCIe based applications with the need for high-bandwidth and uplinks:
  • management for
    • 12 AMCs + optional AMC13 in 2nd MCH slot
    • front and rear cooling units
    • 4 power modules including N+1 redundancy
    • update channel to secondary MCH
    • 4 eRTMs and 2 rear power modules via LLRF backplane
  • support of MCH rear transition modules, i.e. NAT-MCH-RTM-RF, NAT-MCH-RTM-RF-COMex-i7 and NAT-MCH-RTM-RF-COMex-i7Q
  • GigaBit Ethernet switching (Fabric A)
  • PCI Express (Gen3) switching (Fabrics D-G)
  • front panel uplinks
    • 2x 1GbE (load sharing supported)
    • 2x PCIe x8 or 1x PCIe x16 optical uplinks
    • 2x SMA for external CLK support (bi-directional)
    • serial (RS232) and USB console
  • clock generation and distribution by special clock module for Physics (NAT-MCH-CLK-PHYS)
  • configuration options
    • sconsole (USB, RS232 or Telnet)
    • script File
    • web Browser 
  • host based Java GUI for any operating system capable of executing Oracle Java Run-Time Environment (JRE) v1.7 or higher, i.e. Linux, Mac OS-X or Windows
CPU and memory
  • Freescale ColdFire MCF54452 CPU @ 266MHz
  • DDR2 RAM: 32/64MB
  • FLASH: 16/32/64MB

IPMI and Compliance

  • 13 AMCs
  • 2 front and 2 rear cooling units
  • 1-4 power modules incl. N+1 redundnacy
  • PICMG 2.9
  • update to 2nd MCH

Supported Fabrics and Compliance

Fabric A: Gigabit Ethernet

  • 12 AMCs + optional AMC13 in 2nd MCH slot
  • PICMG AMC.2 R1.0
  • PICMG SFP.1 R1.0

Fabric D-G:

  • PCI Express Gen 3 
    • x1 or x4 to 12 AMCs
    • one x16 or two x8 to optical uplink (optional)
    • x16 to RTM or to one AMC slot (requires backplane support)
  • PICMG AMC.1 R1.0

Clock Distribution
NAT-MCH-CLK-PHYS (click for more information)
  • CLK1 and CLK2 by special low jitter and low latency circuitry (NAT-MCH-CLK-PHYS)
  • CLK3  fixed mean 100MHz PCIe clock (HCSL)

Carrier Manager

  • management of up to 13 AMCs, 4 cooling units and 1-4 power modules
  • management of 4 eRTMs and 2 rear power modules via LLRF backplane
  • supports redundant architectures and fail-over procedure
  • support configurable emergency shutdown of AMCs or entire system

Shelf and System Manager

  • For detached or stand-alone operation both managers are available on-board, hook-in for external managers via 1GbE port at front panel

Operating System and API

  • O/S: OK1
  • API: HPI compliant

Indicator LEDs

  • 3 standard AMC LEDs
  • 12 bi-color LEDs for AMC slot stati
  • 2 bi-color LEDs for cooling units
  • 4 bi-color LEDs for power modules
  • 13 bi-color LEDs for PCIe link status (failed, Gen1, Gen2 or Gen3)

Front Panel Connectors

  • 2x 1GbE for management connection and Fabric A system up-link (load sharing supported)
  • external clock reference (bi-directional)
  • serial and USB console connectors
  • Fabric D-G uplink (two x8 or one x16) 


Rev #
Date Last Modified
NAT-MCH-PHYS80_fact_sheet NAT-MCH-PHYS fact sheet pdf 0 KB 1.0 TBD
MCH_UsersManual NAT-MCH Users Manual pdf 1.378 KB 1.25 27-06-2014
MCH-PHYS USBtoSerial USB serial Console installation file inf 4 KB 1.0 03-09-2013
MCH3 USB Driver Installation USB Driver Installation Guide Line pdf 804 KB 1.0 22-06-2012

For further documentation on the NAT-MCH-PHYS80 (i.e. technical reference manuals) please contact us using the contact form. Thank you.

NAT-MCH-PHYS80 block diagram

Product Code: NAT-MCH - [Options]

-PHYS80 double-width full-size MCH for MTCA.4 applications -
-PHYS80-UPLNK like -PHYS80 with additonal optical uplinks (either two x8 or one x16) for PCIe
-RTM-UPLNK double-width full-size Rear Transition Module providing one copper uplink (x16) for PCIe -PHYS
-RTM-RF double-width full-size Rear Transition Module providing management for LLRF backplane and mounting slot for type-6 COMExpress module -PHYS
-RTM-RF-COMex-i7 like -RTM-RF with mounted Intel® Core™ i7 Ivy Bridge ComExpress module dual core
-RTM-RF-COMex-i7Q like -RTM-RF with mounted Intel® Core™ i7 Ivy Bridge ComExpress module quad core (requires LLRF backplane)


  fibre uplink cable for PCIe uplink -
  PCIe card terminating PCIe uplink -


NATView Java based GUI (Graphical User Interface) for monitoring and control of MTCA systems. 2.13 01-07-2014
- Firmware for NAT-MCH, NAT-MCH-PHYS, NAT-MCH-PHYS80 2.15 01-07-2014

Customers registering for the firmware update service will automatically be notified by e-mail when a new firmware version becomes available.