The NPCI-XLINK enables connection of system platforms based on PCI and MicroTCA standards via a PCI Express External Cable Interface. The overall system architecture is built on the concept of a master and a slave rack each containing an XLINK family board. The master rack contains a processor card which transparently controls the slave rack.

XLINK-Family Overview:

Functional Blocks

Hardware based on cPCI

The NPCI-XLINK is a high performance 32-bit, 33 MHz PCI Card compatible with any master PCI slot supporting PCI standards with 3.3V signalling. The PCI interface is 5V tolerant.

At the front panel, the NPCI-XLINK connects the MicroTCA rack to the passive PCI backplane via PCI Express External Cable Connector using a programmable buffer circuitry and a PCIe to PCI bridge device.

The NAMC-XLINK offers master functions such as clock and management signals and identifies the slave interfaces of the NPCI-XLINK using firmware after Power-Up. It is essential to power up the PCI (slave) system first. A rescan of the cable link can be performed at any time with user software.

The NPCI-XLINK is inserted into the system-host slot and controls either 4 slots or 3 slots and a bridge chip. In the largest configuration tens of I/O boards may be driven using bridged PCI backplanes. The I/O racks could be up to 14m apart.

EEPROM (type 24C02)

The EEPROM is an I2C device located on the NPCI-XLINK and connects to the PCIe to PCI bridge via I2C bus. This EEPROM (type 24C02) is mostly used for storing setup information for the PCIe to PCI bridge after Power-Up, but also for storing board-specific information. The EEPROM's address is 0x0. By default, the I2C device 24C02 is not programmed. The bridge initializes with default register values.


The NPCI-XLINK is member of the XLINK-Family which enables the connection of different system platforms via a PCI Express External Cable Interface to a MicroTCA system.

Other XLINK Board Combinations